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Wafer-Level CSP

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In wafer-level chip-scale packaging (WLCSP) technology, the "package", or interconnect elements, are fabricated on the wafer prior to singulation. This makes it different from all other package types in that there is no assembly to a substrate, and the singulated WLCSP is ready for SMT mounting. The area it occupies when mounted onto a printed circuit board is the size of the die.

The greatest benefits of WLCSPs are the true chip-size product and the relative cost of wafer-level processing.  All devices on a wafer are processed and and tested together in wafer form and later singulated into individual chips. Like wafer fabrication, the cost of the WLCSP goes down as the wafer size increases and as the die shrinks.

 

I2A Technologies uses TrueCSP™ technology for solder-ball reinforcement to achieve highly reliable and cost effective WLCSP.  With TrueCSP, high-precision screen printing on wafers is deployed to build a polymer layer which is a structure for anchoring and reinforcing the solder ball.  This eliminates the need for underfill of the assembled die to prevent stress failures of the solder ball interface to the die.

I2A Technoloiges' WLCSP capablities include:

Placement Tolerance: ± 15µ
Min Bump Pitch: 100µ
Min Bump Diamater: 50µ
Max Bump Diamater: 400µ


The TrueCSP printing technology used by I2A Technologies offers significant cost improvements over  photolithography methods of creating the reinforcing structure necessary for reliable WLCSP.  The number of process steps required to screen print the polyimide layer is significantly reduced and requires less costly equipment and facilities than the typical wafer fab processes.
 

 

 
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